1. Field of the Invention
The present invention relates to a method of driving a solid-state imaging device and more particularly, to a method of driving a solid-state imaging device to increase the dynamic range of a CD image sensor.
2. Description of the Prior Art
Charge coupling device (CCD) image sensors offer a variety of applications as imaging picking up devices. Examples are the DSC (digital still camera) and video camera used for home-use, industrial and broadcasting purposes. Electric imaging merchandise has drawn much attraction to the improvement in image quality and sensing speed of CCD-related technology, such as the photo-sensing device structure and/or the driving circuit.
FIG. 1 shows a conventional solid-state imaging apparatus that includes a plurality of photo sensors 100 arranged in association with a plurality of vertical CCD registers 200 (herein after called VCCD) in columns. In addition, a row of horizontal CCD registers 300 is disposed and connected with one end of each columns of vertical CCD registers to transfer the signal charges received from those vertical CCD registers to an output circuit member 400.
The detailed relationship between a photo sensor array and a VCCD is illustrated with an example of a column of the same. Simultaneously referring to FIG. 1 and FIG. 2A, a first photo sensor 111 is adjacent to a first VCCD register 211 and a second photo 112 is connected with a third VCCD register 213 on the one side in the horizontal direction. The other side of each photo sensor 100 is adjacent to an isolation region 50. In the vertical direction, the VCCD register 211 is connected in series adjacent to VCCD registers 212, 213, 214 and so on. In addition, the VCCD registers 211, 212, 213, and 214 are connected to electrodes V1, V2, V3 and V4, respectively. The VCCD registers 215, 216, 217, and 218 are connected with electrodes V1, V2, V3 and V4, respectively. In other word, the signal charges transferred are carried out by modes of the four phases. Furthermore, the photo sensors 111, 112 and 113 are treated by complementary color filters so that they receive different signal charges. That is, three adjacent photo sensors constitute a set for representing the original color. For example, the first photo sensor 111 accesses the magenta color signal and the second photo sensor 112 accesses another kind of signal such as cyan. The third photo-sensor 113 accesses the green color signal. The remaining photo sensors of each of columns are arranged in a similar way.
Before picking up each pixel of an image, as shown in FIG. 2B, the contents of a photo sensor array 100 must first be reset. A sufficient high reverse voltage level of about 30 V (herein after called VH) is applied at a terminal VSUB to form a depletion region 35 for each photo sensor. When the depletion regions 35 are expanded to overlap N-regions 40 of the photo sensor array 100, any charges in the photo sensors 100 are then discharged to the N-SUB 30. On the other hand, to start picking up an image, the terminal VSUB is supplied with a slighter lower level (herein after called VM) of reverse bias of about 15 V. At this time, the depletion region 35 is formed and the signal charges in the photo sensors 100 are stored, as shown in FIG. 2C.
To read out the signal charges from a photo sensor, the electrode V1 should have a sufficient high voltage applied thereto. FIG. 2D shows various depths of the potential wells with respect to the timing and the voltage levels. At a time T1, V1 is at a voltage level xe2x80x9cmxe2x80x9d, and a depth of the potential well under electrode V1at about an xe2x80x9cmxe2x80x9d level is formed. However, there is nothing to dispose to the VCCD 200 because there is a potential barrier to prevent the charge signal blooming. At a time T2, the corresponding potential decreases, and the height of the potential barriers increases. To read out the signal charges in a photo sensor, at a time of T3, the potential barrier disappears in response to a voltage level xe2x80x9chxe2x80x9d supplied at electrode V1. A deep potential well is formed under the electrode V1 regions so that the signal charges are disposed thereto.
Referring to FIG. 3A, a waveform diagram showing the timings with respect to various pluses is given to illustrate a conventional method of driving the solid-state imaging device shown in FIGS. 1-2. The VSUB, is pulsed with a high voltage of about VH to reset the photo sensors 100 firstly, and then supplied with a slightly reverse bias VMat the time indicated by xe2x80x9c@xe2x80x9d. When the photo sensors 100 are exposed to the optical signal, the signal charges can be stored in it. Each of the photo sensors 100 provides an upper limited quantity xe2x80x9cQxe2x80x9d of the charge storage capacity, and the charges in the photo sensors 200 are saturated after a period of time Cs. Therefore, to avoid a charge bloom, the vertical blanking signal VBLK is lowered (blanked) to a xe2x80x9c0xe2x80x9d state prior to saturation of the signal charges in photo sensors 100. At the same time, the exposure of photo sensors 100 is stopped. Generally, the signal charges in photo sensors 100 are not read out to the VCCD registers. 200 until time xe2x80x9c(copyright)xe2x80x9d in response to reading pulses XSG 1 and XSG2. It is noted that the XSG1 is processed by an inverter (not shown), and then connected to the electrode V1. The processed voltage level of the pulse XSG1 is same as the voltage level xe2x80x9chxe2x80x9d indicated in FIG. 2D. The XSG2 is similar to the XSG1 pulse being processed by an inverter (not shown), but the processed voltage of the pulse XSG2 is then connected to electrode V3 so as to read out the signal charges in the second photo sensor 112 thereof.
An example of charges transferred by four-phase CCD is shown in FIG. 4. It is noted that the pulse XV1 is also processed by an inverter (not shown) and then the processed pulse of XV1 is applied to the electrode V1 to form a potential well thereunder. Certainly, as indicated in FIG. 2D, the depth of potential well varies with the magnitude of voltage level. The pulses XV2, XV3, and XV4 are similar to XV1, which are respectively in response to the electrode V2, V3, and V4. At a T1 time, XV1 and XV2 are supplied with a lower voltage. That is, both V1 and V2 are in a xe2x80x9chighxe2x80x9d state. Thus a potential well 201 under electrode XV1 and XV2 is formed, and charges Q are stored there. At a time of T2, XV2 remains the same, but XV1 voltage is increased by half and XV3 voltage is decreased by half, and thus two shallow potential wells 202, 203 and a deep potential well 204 are, respectively, formed under the electrodes V1, V3 and V2. In other words, a portion of the charges Q is transferred from the region under the electrode XV1 to that of electrode XV3. Similarly, at T3 time, the XV1 is raised to a high state (V1 is at xe2x80x9clow statexe2x80x9d), and thus the potential well thereunder disappears. The chares Q is then completely transferred from a region under the electrode V1 to a region under the electrodes V2 and V3, which have a high voltage. Finally, at a time of T4 all charges Q are adjacently disposed on the right side thereof as shown in FIG. 4, and the potential well is formed under electrodes V3 and V4.
Conventional transferal of the signal charges in VCCD using SONY ICX058AK chip is given as an example. It is done by an interlacing manner. As is shown in FIG. 3A and FIG. 1, a sufficient high reverse voltage level of about 30 V (herein after called VH) is applied at a terminal VSUB to reset all the photo sensors 100, which are then exposed to the optical light start. The photo sensors 100 receive the signal charges for a period of time Cs. When BLK falls down to a xe2x80x9clowxe2x80x9d state, the first photo sensor 111 receives Q11, a quantity of charges, the second photo sensor 112 receives charges Q12, the third photo sensor 113 receives Q13, and so on. It is noted that the photo sensor 111, 112 and 113 are treated by complementary color filters so that they receive different signal charges. That is, three adjacent photo sensors constitute a set for representing the original color.
FIG. 3B shows a local magnifying timing diagram versus the odd field signal charges transferring pulse. A column of photo sensors and associated VCCD are again used as an example of data received and transferred. At a time xe2x80x9cB1xe2x80x9d, a reading pulse XSG1 is supplied to read out signal charges Q11 received by a first photo sensor 111 into a potential well of VCCD 211 (herein and after called VCCD [211]. Similarly, Q12 is stored to VCCD [213], and Q3 stores to VCCD [215]. It is noted that the electrode of VCCD 211 is supplied with xe2x80x9cXV1xe2x80x9d and VCCD 215 is the same. The same is the VCCD 222 and VCCD 112 and both electrodes are labeled as V2. At a time ofxe2x80x9cB3xe2x80x9d, XV1, XV2, and XV3 are in a xe2x80x9c0xe2x80x9d state but XV4 is in a xe2x80x9c1xe2x80x9d state.
For ODD field transferring, the Q11 is added to the Q12 and then stored in a potential well formed of VCCD 211,VCCD 212, and VCCD 213. At a time of xe2x80x9cB4xe2x80x9d, XV1 and XV4 are in a xe2x80x9c1xe2x80x9d state, XV2 and XV3 in a xe2x80x9c0xe2x80x9d state; thus Q11+Q12 then is moved forward to VCCD[112 and 113]. At a time of xe2x80x9cB5xe2x80x9d, XV1 is in a xe2x80x9c1xe2x80x9d state but XV2, XV3, XV4 are in a xe2x80x9c0xe2x80x9d state; thus Q11+Q12 is then transferred to VCCD [212, 213 and 214]. At a time xe2x80x9cB6xe2x80x9d, XV1 and XV2 are in xe2x80x9c1xe2x80x9d state but XV3, XV4 are in xe2x80x9c0xe2x80x9d state; thus Q1+Q2 then is moved to VCCD [213 and 214] and then moved to VCCD [213,214, and 215] at time xe2x80x9cB7xe2x80x9d. In a similar manner, when Q1 and Q2 then are moved finally to VCCD [214 and 215], the Q3 and Q4 are moved to VCCD [218 and 219] at time xe2x80x9cB8xe2x80x9d. At the same time, the signal charges of the VCCD register to most adjacent horizontal CCD registers (called HCCD) and then are firstly disposed to HCCD 300. The signal charges in HCCD are transferred in two phases, H1 and H2. The signal charge is transferred in the same fashion as mentioned with regard to VCCD. Finally, a 0.5 horizontal line, the field xe2x80x9c1xe2x80x9d corresponding to the signal charges of the last two rows of the photo sensors, and then output a field xe2x80x9c3xe2x80x9d corresponding to the signal charges of the last third and fourth rows of photo sensors.
For an xe2x80x9cEVENxe2x80x9d field transferal, as shown in FIG. 3C, the signal charges Q11, Q12, Q13 . . . , are, respectively, in VCCD [211], [213], and [215], ready to be transferred. At a time of xe2x80x9cC1xe2x80x9d, XV1, XV3, and XV4 are in a xe2x80x9c0xe2x80x9d state but XV2 is in a xe2x80x9c1xe2x80x9d state, and thus the Q11 is stored in VCCD [211] and Q2+Q3 is stored in VCCD [213, 214, and 215]. At a time of xe2x80x9cC2xe2x80x9d, XV1 and XV4 are in xe2x80x9c0xe2x80x9d state, XV2 and XV3 in xe2x80x9c1xe2x80x9d state, Q1 still remains in VCCD [211], and Q2+Q3 is moved forward to VCCD [214 and 215]. At a time of xe2x80x9cC3xe2x80x9d, XV3 is in xe2x80x9c1xe2x80x9d state but XV1, XV2 and XV4 are in xe2x80x9c0xe2x80x9d state, and thus Q1is transferred to VCCD [211 and 212], and Q2+Q3 is transferred to VCCD [214, 215, and 216]. At a time of xe2x80x9cC4xe2x80x9d, XV1 and XV2 are in xe2x80x9c0xe2x80x9d state but XV3, XV4 are in xe2x80x9c1xe2x80x9d state; thus Q1 is then transferred to the potential well of VCCD [211 and 212], and Q2+Q3 is moved to VCCD [215 and 216]. In a similar manner, the signal charges in the photo sensors most adjacent to a plurality of HCCD then are firstly disposed to HCCD. Another 0.5 horizontal line is output, the field xe2x80x9c2xe2x80x9d corresponding to the signal charges of the last row of photo sensors is output, and then a field xe2x80x9c4xe2x80x9d corresponding to the signal charges of the last second and third rows of photo sensors is output.
The problems occurring in the prior art are as follows:
Since each of the photo sensors with a capacitor can store only a limit quantity of charges, some of the signals need to be sacrificed. This is because a desired image, in general, comprises both strong contrast regions and weak contrast regions. If charge blooming in the sensor were prevented for a bright region, the information received in the sensor for the heavily dark region would not be enough. In contrast, is the heavily dark region were sufficiently intense, charge blooming in the sensor would occur for a bright region.
A method of driving a solid-state imaging device to increase the dynamic range of a CCD image sensor is disclosed. The imaging device comprises a plurality of light-receiving members arranged in a matrix in horizontal and vertical directions. In addition, a plurality of columns of vertical CCD registers associate with the light-receiving members for storing signal charges received from a plurality of light receiving members. A row of horizontal CCD registers is disposed and connected with one end of each columns of vertical CCD registers to transfer the signal charges received from those vertical CCD registers to an output circuit member. The method comprises receiving the signal charges from an object by those light receiving members to a time period Cs firstly in a normal fashion in BLANKING xe2x80x9chighxe2x80x9d period. Then the extra exposure time Cx is performed by utilizing the BLANKING xe2x80x9clowxe2x80x9d period as follows: sending a reading pulse to read out the signal charges from all of those light receiving members simultaneously and independently to the adjacent vertical CCD registers at a beginning of a blanking period. After that, the light receiving members are vacant. Receiving the signal charges from the object by light receiving member and reading the signal charges into vertical CCD steps are done repeatedly, several times, to increase the dynamic range. The Cx should be smaller than (nxe2x88x92l)xc3x97Cs to avoid charge blooming, where n is the value of a capacity of VCCD divided by a capacity of photo sensor.